Trace number 3162411

Some explanations

A solver is run under the control of another program named runsolver. runsolver is in charge of imposing the CPU time limit and the memory limit to the solver. It also monitors some information about the process. The trace of the execution of a solver is divided into four (or five) parts:
  1. SOLVER DATA
    This is the output of the solver (stdout and stderr).
    Note that some very long lines in this section may be truncated by your web browser ! In such a case, you may want to use the "Download as text" link to get the trace as a text file.

    When the --timestamp option is passed to the runsolver program, each line output by the solver is prepended with a timestamp which indicates at what time the line was output by the solver. Times are relative to the start of the program, given in seconds. The first timestamp (if present) is estimated CPU time. The last timestamp is wall clock time.

    As some 'v lines' may be very long (sometimes several megabytes), the 'v line' output by your solver may be split on several lines to help limit the size of the trace recorded in the database. In any case, the exact output of your solver is preserved in a trace file.
  2. VERIFIER DATA
    The output of the solver is piped to a verifier program which will search a value line "v " and, if found, will check that the given interpretation satisfies all constraints.
  3. CONVERSION SCRIPT DATA (Optionnal)
    When a conversion script is used, this section shows the messages that were output by the conversion script.
  4. WATCHER DATA
    This is the informations gathered by the runsolver program. It first prints the different limits. There's a first limit on CPU time set to X seconds (see the parameters in the trace). After this time has ellapsed, runsolver sends a SIGTERM and 2 seconds later a SIGKILL to the solver. For safety, there's also another limit set to X+30 seconds which will send a SIGXPU to the solver. The last limit is on the virtual memory used by the process (see the parameters in the trace).
    Every ten seconds, the runsolver process fetches the content of /proc/loadavg, /proc/pid/stat and /proc/pid/statm (see man proc) and prints it as raw data. This is only recorded in case we need to investigate the behaviour of a solver. The memory used by the solver (vsize) is also given every ten seconds.
    When the solver exits, runsolver prints some informations such as status and time. CPU usage is the ratio CPU Time/Real Time.
  5. LAUNCHER DATA
    These informations are related to the script which will launch the solver. The most important informations are the command line given to the solver, the md5sum of the different files and the dump of the /proc/cpuinfo and /proc/meminfo which provides some useful information on the computer.

Solver answer on this benchmark

Solver NameAnswerCPU timeWall clock time
sparrow2011 sparrow2011_ubcsat1.2_2011-03-02SAT 4.48732 4.48867

General information on the benchmark

Namerandom/large/
unif-k3-r4.2-v5000-c21000-S1259410977-065-UNKNOWN.cnf
MD5SUM01bef578d60d53fc18e9469f59ed2fd1
Bench CategoryRANDOM (random instances)
Best result obtained on this benchmarkSAT
Best CPU time to get the best result obtained on this benchmark4.48732
Satisfiable
(Un)Satisfiability was proved
Number of variables5000
Number of clauses21000
Sum of the clauses size63000
Maximum clause length3
Minimum clause length3
Number of clauses of size 10
Number of clauses of size 20
Number of clauses of size 321000
Number of clauses of size 40
Number of clauses of size 50
Number of clauses of size over 50

Solver Data 

4.40/4.48	c 
4.40/4.48	c UBCSAT version 1.2-sparrow2011 (based on BETA 1.2-b10) SAT11 Sparrow Build
4.40/4.48	c 
4.40/4.48	c http://www.satlib.org/ubcsat
4.40/4.48	c 
4.40/4.48	c ubcsat -h for help
4.40/4.48	c 
4.40/4.48	s SATISFIABLE
4.40/4.48	v  -1 -2 3 4 -5 -6 7 -8 9 -10
4.40/4.48	v  -11 12 13 14 15 -16 -17 18 -19 -20
4.40/4.48	v  21 22 23 24 25 -26 27 28 -29 -30
4.40/4.48	v  -31 -32 -33 -34 35 36 37 38 -39 -40
4.40/4.48	v  41 42 43 -44 45 46 -47 -48 49 -50
4.40/4.48	v  -51 52 -53 -54 55 -56 57 58 59 -60
4.40/4.48	v  61 62 -63 -64 -65 -66 67 -68 69 -70
4.40/4.48	v  -71 -72 -73 74 -75 -76 -77 -78 -79 -80
4.40/4.48	v  -81 82 -83 84 -85 -86 87 -88 -89 -90
4.40/4.48	v  91 -92 93 -94 95 -96 97 98 -99 100
4.40/4.48	v  -101 -102 103 104 105 -106 107 -108 109 110
4.40/4.48	v  111 -112 -113 114 -115 -116 -117 118 119 -120
4.40/4.48	v  -121 122 123 124 -125 126 127 -128 -129 130
4.40/4.48	v  131 132 -133 -134 -135 -136 -137 138 -139 140
4.40/4.48	v  -141 -142 143 -144 -145 146 147 -148 -149 150
4.40/4.48	v  151 152 153 -154 -155 156 -157 -158 159 -160
4.40/4.48	v  -161 162 -163 -164 165 -166 -167 -168 -169 -170
4.40/4.48	v  -171 172 -173 174 175 176 177 -178 -179 -180
4.40/4.48	v  181 -182 -183 184 185 186 -187 188 189 190
4.40/4.48	v  191 192 193 -194 195 196 -197 198 -199 200
4.40/4.48	v  201 -202 203 204 -205 -206 207 -208 -209 210
4.40/4.48	v  211 -212 -213 214 215 -216 217 -218 -219 220
4.40/4.48	v  221 -222 223 224 225 226 -227 -228 229 -230
4.40/4.48	v  231 232 233 234 235 236 -237 238 239 240
4.40/4.48	v  241 242 243 244 -245 246 -247 -248 249 -250
4.40/4.48	v  251 -252 -253 254 255 -256 257 -258 259 260
4.40/4.48	v  261 -262 -263 264 -265 -266 267 268 269 270
4.40/4.48	v  271 -272 -273 274 275 276 -277 278 279 -280
4.40/4.48	v  -281 282 -283 -284 -285 -286 -287 -288 -289 290
4.40/4.48	v  -291 -292 293 294 295 -296 297 298 -299 -300
4.40/4.48	v  301 302 -303 -304 -305 -306 307 -308 309 310
4.40/4.48	v  -311 312 -313 314 315 316 -317 318 319 320
4.40/4.48	v  321 322 323 -324 325 -326 327 -328 329 330
4.40/4.48	v  -331 332 -333 334 335 336 337 338 -339 -340
4.40/4.48	v  -341 -342 -343 -344 -345 346 -347 -348 -349 350
4.40/4.48	v  -351 352 353 354 -355 -356 -357 -358 -359 360
4.40/4.48	v  361 -362 363 -364 365 -366 -367 -368 -369 -370
4.40/4.48	v  -371 -372 -373 -374 375 -376 -377 378 -379 380
4.40/4.48	v  381 -382 383 -384 385 386 -387 388 389 390
4.40/4.48	v  391 -392 -393 -394 395 -396 -397 -398 -399 -400
4.40/4.48	v  -401 402 -403 -404 -405 -406 407 408 409 410
4.40/4.48	v  -411 412 -413 -414 415 -416 417 -418 419 -420
4.40/4.48	v  -421 -422 423 -424 -425 426 -427 428 -429 430
4.40/4.48	v  431 432 -433 -434 435 436 437 -438 439 440
4.40/4.48	v  -441 -442 -443 444 445 -446 -447 448 449 450
4.40/4.48	v  -451 452 453 454 -455 456 -457 458 -459 460
4.40/4.48	v  461 462 -463 -464 -465 466 -467 468 469 470
4.40/4.48	v  -471 472 -473 -474 475 476 477 478 -479 -480
4.40/4.48	v  481 482 -483 -484 -485 -486 487 -488 -489 -490
4.40/4.48	v  -491 492 -493 494 -495 496 -497 498 499 500
4.40/4.48	v  501 -502 -503 -504 -505 506 -507 -508 -509 510
4.40/4.48	v  -511 512 -513 514 -515 516 -517 -518 -519 520
4.40/4.48	v  521 522 -523 524 525 526 -527 528 529 -530
4.40/4.48	v  531 532 -533 -534 -535 -536 537 -538 539 540
4.40/4.48	v  541 -542 543 544 -545 -546 547 -548 -549 -550
4.40/4.48	v  -551 552 -553 -554 -555 -556 -557 -558 559 560
4.40/4.48	v  -561 562 -563 -564 -565 -566 567 -568 -569 570
4.40/4.48	v  571 572 -573 574 -575 576 577 -578 579 580
4.40/4.48	v  581 582 -583 -584 -585 -586 -587 588 589 -590
4.40/4.48	v  591 592 -593 594 -595 -596 597 598 -599 600
4.40/4.48	v  601 -602 -603 604 605 -606 607 608 -609 610
4.40/4.48	v  611 -612 -613 -614 615 616 617 618 -619 620
4.40/4.48	v  -621 -622 -623 -624 625 -626 -627 628 -629 -630
4.40/4.48	v  -631 632 633 -634 -635 636 637 -638 -639 640
4.40/4.48	v  641 -642 643 -644 645 -646 -647 648 649 -650
4.40/4.48	v  -651 652 653 654 -655 656 -657 -658 659 660
4.40/4.48	v  661 662 -663 -664 -665 666 -667 -668 -669 670
4.40/4.48	v  -671 -672 -673 -674 -675 676 677 -678 679 -680
4.40/4.48	v  681 682 -683 -684 -685 -686 687 -688 689 690
4.40/4.48	v  691 692 693 694 695 696 -697 -698 699 -700
4.40/4.48	v  -701 -702 -703 704 705 -706 -707 -708 -709 710
4.40/4.48	v  -711 712 713 -714 -715 716 717 718 719 720
4.40/4.48	v  721 722 723 724 725 726 727 728 729 730
4.40/4.48	v  731 -732 733 -734 735 -736 -737 -738 -739 -740
4.40/4.48	v  741 742 743 -744 -745 -746 -747 -748 749 750
4.40/4.48	v  -751 752 753 754 755 756 757 758 759 760
4.40/4.48	v  -761 762 763 764 765 766 -767 768 769 -770
4.40/4.48	v  771 772 773 774 -775 776 777 -778 779 780
4.40/4.48	v  781 -782 -783 784 785 -786 787 -788 789 790
4.40/4.48	v  -791 -792 793 -794 795 796 -797 -798 -799 800
4.40/4.48	v  -801 -802 803 -804 -805 -806 -807 -808 -809 -810
4.40/4.48	v  -811 -812 813 -814 815 -816 817 818 -819 820
4.40/4.48	v  -821 822 823 824 825 -826 827 828 829 830
4.40/4.48	v  831 832 -833 -834 -835 -836 -837 -838 839 -840
4.40/4.48	v  841 842 -843 -844 -845 846 847 -848 -849 850
4.40/4.48	v  -851 -852 853 854 -855 -856 -857 858 -859 860
4.40/4.48	v  -861 -862 -863 -864 865 866 867 868 -869 -870
4.40/4.48	v  871 -872 -873 -874 -875 -876 877 878 -879 -880
4.40/4.48	v  881 882 -883 884 885 886 -887 888 889 890
4.40/4.48	v  -891 892 893 -894 895 -896 897 -898 899 900
4.40/4.48	v  -901 -902 -903 904 -905 906 907 -908 -909 -910
4.40/4.48	v  911 912 913 -914 -915 916 -917 918 919 920
4.40/4.48	v  921 922 -923 -924 -925 926 -927 -928 929 930
4.40/4.48	v  931 932 933 -934 935 -936 -937 -938 -939 -940
4.40/4.48	v  -941 942 943 944 -945 -946 947 948 -949 -950
4.40/4.48	v  -951 952 953 954 -955 -956 957 -958 959 -960
4.40/4.48	v  -961 962 963 964 -965 -966 967 -968 -969 -970
4.40/4.48	v  971 -972 973 974 -975 -976 -977 -978 979 980
4.40/4.48	v  981 982 983 984 -985 -986 -987 -988 989 990
4.40/4.48	v  991 992 993 -994 -995 996 997 998 -999 1000
4.40/4.48	v  1001 1002 -1003 -1004 -1005 -1006 -1007 1008 -1009 -1010
4.40/4.48	v  -1011 1012 -1013 1014 -1015 -1016 1017 -1018 1019 1020
4.40/4.48	v  1021 1022 -1023 -1024 1025 -1026 1027 -1028 1029 -1030
4.40/4.48	v  1031 1032 -1033 -1034 -1035 -1036 1037 -1038 -1039 -1040
4.40/4.48	v  1041 -1042 1043 1044 -1045 -1046 1047 1048 -1049 -1050
4.40/4.48	v  -1051 1052 1053 1054 1055 1056 -1057 1058 -1059 -1060
4.40/4.48	v  -1061 -1062 -1063 -1064 -1065 1066 1067 1068 1069 -1070
4.40/4.48	v  -1071 1072 1073 1074 1075 1076 1077 -1078 1079 -1080
4.40/4.48	v  -1081 1082 1083 -1084 -1085 1086 -1087 -1088 -1089 1090
4.40/4.48	v  1091 -1092 -1093 1094 -1095 1096 1097 1098 1099 -1100
4.40/4.48	v  1101 1102 -1103 1104 -1105 1106 1107 1108 1109 -1110
4.40/4.48	v  -1111 1112 -1113 1114 1115 -1116 -1117 -1118 -1119 -1120
4.40/4.48	v  -1121 -1122 1123 -1124 -1125 -1126 1127 1128 -1129 1130
4.40/4.48	v  -1131 -1132 -1133 -1134 -1135 -1136 1137 -1138 1139 -1140
4.40/4.48	v  1141 1142 -1143 1144 -1145 -1146 1147 -1148 -1149 1150
4.40/4.48	v  1151 -1152 1153 -1154 -1155 1156 1157 1158 -1159 -1160
4.40/4.48	v  -1161 -1162 1163 -1164 1165 1166 1167 -1168 1169 -1170
4.40/4.48	v  1171 1172 1173 1174 1175 -1176 -1177 -1178 1179 -1180
4.40/4.48	v  1181 -1182 -1183 1184 -1185 1186 1187 -1188 -1189 1190
4.40/4.48	v  1191 -1192 -1193 -1194 1195 -1196 -1197 1198 -1199 1200
4.40/4.48	v  1201 1202 1203 1204 -1205 -1206 1207 1208 1209 -1210
4.40/4.48	v  1211 -1212 1213 1214 -1215 -1216 -1217 -1218 1219 -1220
4.40/4.48	v  1221 1222 1223 -1224 1225 1226 1227 -1228 1229 1230
4.40/4.48	v  -1231 1232 -1233 -1234 -1235 1236 1237 1238 -1239 1240
4.40/4.48	v  1241 1242 1243 1244 1245 1246 1247 -1248 1249 1250
4.40/4.48	v  -1251 1252 -1253 -1254 -1255 -1256 -1257 1258 1259 -1260
4.40/4.48	v  1261 -1262 1263 1264 -1265 -1266 1267 1268 -1269 1270
4.40/4.48	v  1271 1272 1273 -1274 1275 1276 -1277 1278 -1279 1280
4.40/4.48	v  -1281 -1282 -1283 -1284 -1285 1286 1287 -1288 1289 -1290
4.40/4.48	v  1291 -1292 -1293 1294 1295 -1296 -1297 1298 1299 1300
4.40/4.48	v  -1301 1302 1303 -1304 1305 -1306 -1307 -1308 -1309 1310
4.40/4.48	v  1311 -1312 1313 1314 -1315 1316 -1317 -1318 -1319 1320
4.40/4.48	v  1321 -1322 -1323 1324 -1325 1326 -1327 1328 1329 -1330
4.40/4.48	v  -1331 1332 1333 1334 1335 -1336 1337 -1338 -1339 1340
4.40/4.48	v  -1341 1342 1343 -1344 1345 -1346 -1347 -1348 1349 -1350
4.40/4.48	v  -1351 -1352 1353 -1354 1355 -1356 -1357 -1358 -1359 -1360
4.40/4.48	v  -1361 -1362 -1363 1364 1365 -1366 1367 -1368 1369 -1370
4.40/4.48	v  -1371 -1372 -1373 1374 -1375 -1376 -1377 -1378 1379 -1380
4.40/4.48	v  1381 1382 1383 -1384 1385 1386 -1387 1388 -1389 1390
4.40/4.48	v  -1391 1392 1393 1394 1395 -1396 1397 1398 1399 1400
4.40/4.48	v  1401 1402 -1403 -1404 -1405 1406 1407 -1408 1409 -1410
4.40/4.48	v  1411 -1412 -1413 1414 -1415 1416 1417 -1418 -1419 1420
4.40/4.48	v  -1421 1422 1423 1424 1425 1426 1427 1428 1429 1430
4.40/4.48	v  1431 -1432 -1433 -1434 1435 -1436 -1437 1438 1439 1440
4.40/4.48	v  -1441 1442 1443 1444 -1445 -1446 -1447 1448 -1449 1450
4.40/4.48	v  1451 -1452 1453 -1454 1455 1456 -1457 1458 1459 -1460
4.40/4.48	v  -1461 1462 -1463 -1464 -1465 1466 -1467 1468 -1469 -1470
4.40/4.48	v  -1471 1472 -1473 -1474 1475 -1476 1477 1478 -1479 -1480
4.40/4.48	v  1481 -1482 -1483 1484 -1485 1486 1487 1488 1489 -1490
4.40/4.48	v  -1491 -1492 -1493 -1494 1495 -1496 1497 -1498 -1499 1500
4.40/4.48	v  1501 1502 -1503 1504 -1505 -1506 -1507 -1508 1509 -1510
4.40/4.48	v  1511 -1512 1513 -1514 -1515 1516 -1517 1518 1519 1520
4.40/4.48	v  -1521 -1522 -1523 -1524 1525 1526 1527 -1528 -1529 1530
4.40/4.48	v  1531 1532 -1533 -1534 -1535 -1536 1537 -1538 -1539 -1540
4.40/4.48	v  1541 -1542 -1543 1544 -1545 1546 -1547 -1548 -1549 -1550
4.40/4.48	v  1551 -1552 1553 -1554 1555 1556 -1557 -1558 1559 -1560
4.40/4.48	v  -1561 1562 -1563 1564 1565 1566 -1567 1568 1569 -1570
4.40/4.48	v  1571 1572 -1573 1574 -1575 -1576 1577 -1578 1579 1580
4.40/4.48	v  1581 1582 -1583 1584 1585 -1586 1587 -1588 -1589 1590
4.40/4.48	v  1591 1592 -1593 1594 1595 -1596 1597 1598 1599 1600
4.40/4.48	v  -1601 -1602 -1603 -1604 1605 -1606 -1607 1608 1609 -1610
4.40/4.48	v  1611 -1612 -1613 -1614 -1615 -1616 1617 1618 1619 -1620
4.40/4.48	v  -1621 -1622 1623 1624 1625 1626 1627 1628 1629 -1630
4.40/4.48	v  -1631 -1632 1633 -1634 1635 1636 1637 -1638 -1639 -1640
4.40/4.48	v  -1641 -1642 -1643 -1644 1645 -1646 -1647 -1648 1649 -1650
4.40/4.48	v  1651 -1652 -1653 -1654 -1655 -1656 1657 1658 -1659 -1660
4.40/4.48	v  -1661 -1662 -1663 1664 1665 -1666 1667 -1668 -1669 1670
4.40/4.48	v  -1671 -1672 1673 -1674 1675 1676 1677 1678 -1679 1680
4.40/4.48	v  -1681 -1682 1683 -1684 -1685 -1686 1687 1688 -1689 1690
4.40/4.48	v  -1691 1692 1693 -1694 -1695 1696 1697 -1698 1699 1700
4.40/4.48	v  -1701 -1702 -1703 -1704 1705 -1706 -1707 -1708 -1709 -1710
4.40/4.48	v  -1711 1712 -1713 -1714 1715 1716 1717 1718 -1719 -1720
4.40/4.48	v  1721 -1722 -1723 -1724 1725 -1726 -1727 -1728 1729 -1730
4.40/4.48	v  1731 1732 -1733 -1734 1735 1736 1737 -1738 1739 1740
4.40/4.48	v  -1741 1742 1743 1744 1745 -1746 -1747 -1748 -1749 -1750
4.40/4.48	v  1751 -1752 1753 1754 -1755 -1756 -1757 -1758 -1759 1760
4.40/4.48	v  -1761 -1762 -1763 1764 -1765 1766 1767 1768 -1769 1770
4.40/4.48	v  1771 1772 1773 -1774 1775 -1776 1777 -1778 -1779 -1780
4.40/4.48	v  1781 1782 1783 1784 1785 -1786 -1787 -1788 -1789 -1790
4.40/4.48	v  -1791 -1792 1793 1794 1795 -1796 1797 1798 -1799 -1800
4.40/4.48	v  -1801 1802 1803 -1804 -1805 1806 -1807 1808 -1809 1810
4.40/4.48	v  -1811 1812 -1813 1814 1815 -1816 -1817 -1818 -1819 -1820
4.40/4.48	v  -1821 -1822 -1823 1824 -1825 1826 1827 1828 1829 1830
4.40/4.48	v  -1831 -1832 1833 -1834 -1835 1836 -1837 1838 -1839 -1840
4.40/4.48	v  1841 1842 1843 -1844 1845 1846 1847 1848 -1849 1850
4.40/4.48	v  1851 1852 -1853 1854 -1855 1856 -1857 -1858 -1859 1860
4.40/4.48	v  1861 1862 1863 -1864 -1865 1866 -1867 -1868 1869 -1870
4.40/4.48	v  -1871 1872 1873 -1874 -1875 -1876 1877 -1878 -1879 1880
4.40/4.48	v  -1881 -1882 1883 -1884 -1885 -1886 1887 1888 -1889 1890
4.40/4.48	v  -1891 1892 1893 -1894 1895 1896 -1897 1898 1899 1900
4.40/4.48	v  1901 1902 1903 -1904 1905 1906 1907 1908 1909 1910
4.40/4.48	v  1911 -1912 -1913 -1914 -1915 1916 -1917 -1918 -1919 -1920
4.40/4.48	v  1921 -1922 1923 -1924 1925 -1926 -1927 -1928 1929 -1930
4.40/4.48	v  -1931 -1932 1933 -1934 1935 1936 -1937 -1938 1939 -1940
4.40/4.48	v  -1941 1942 1943 -1944 1945 1946 -1947 -1948 1949 1950
4.40/4.48	v  -1951 1952 -1953 -1954 -1955 1956 -1957 1958 -1959 1960
4.40/4.48	v  -1961 1962 -1963 1964 1965 1966 -1967 1968 1969 -1970
4.40/4.48	v  1971 -1972 1973 1974 -1975 1976 1977 -1978 -1979 1980
4.40/4.48	v  1981 1982 -1983 -1984 -1985 -1986 -1987 -1988 1989 -1990
4.40/4.48	v  1991 1992 1993 -1994 -1995 1996 -1997 1998 -1999 -2000
4.40/4.48	v  2001 -2002 -2003 2004 2005 -2006 2007 -2008 -2009 2010
4.40/4.48	v  -2011 -2012 2013 -2014 2015 2016 -2017 -2018 -2019 2020
4.40/4.48	v  -2021 -2022 -2023 -2024 2025 2026 -2027 2028 -2029 -2030
4.40/4.48	v  -2031 2032 -2033 -2034 -2035 -2036 -2037 2038 -2039 2040
4.40/4.48	v  2041 2042 -2043 -2044 -2045 2046 2047 2048 2049 2050
4.40/4.48	v  -2051 -2052 2053 2054 -2055 2056 -2057 2058 2059 -2060
4.40/4.48	v  -2061 -2062 2063 2064 2065 -2066 2067 2068 -2069 -2070
4.40/4.48	v  2071 -2072 -2073 -2074 2075 -2076 2077 2078 -2079 2080
4.40/4.48	v  2081 2082 -2083 2084 2085 -2086 -2087 -2088 -2089 2090
4.40/4.48	v  2091 2092 2093 2094 2095 2096 2097 2098 2099 2100
4.40/4.48	v  -2101 -2102 -2103 2104 -2105 2106 -2107 -2108 2109 2110
4.40/4.48	v  2111 -2112 2113 2114 -2115 2116 2117 -2118 -2119 2120
4.40/4.48	v  2121 -2122 2123 -2124 -2125 2126 2127 2128 2129 2130
4.40/4.48	v  -2131 -2132 2133 2134 2135 2136 2137 2138 -2139 2140
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4.40/4.48	v  4351 4352 4353 -4354 -4355 -4356 4357 4358 4359 4360
4.40/4.48	v  4361 4362 4363 -4364 4365 -4366 4367 -4368 -4369 -4370
4.40/4.48	v  4371 -4372 4373 4374 4375 -4376 4377 4378 4379 4380
4.40/4.48	v  4381 -4382 4383 -4384 -4385 -4386 4387 4388 -4389 -4390
4.40/4.48	v  -4391 4392 4393 -4394 4395 -4396 -4397 -4398 4399 4400
4.40/4.48	v  -4401 4402 4403 4404 4405 4406 -4407 4408 -4409 4410
4.40/4.48	v  -4411 -4412 4413 4414 -4415 -4416 -4417 -4418 -4419 4420
4.40/4.48	v  4421 -4422 -4423 4424 -4425 4426 4427 -4428 -4429 -4430
4.40/4.48	v  -4431 4432 -4433 -4434 -4435 4436 4437 -4438 4439 -4440
4.40/4.48	v  -4441 -4442 4443 -4444 4445 4446 -4447 -4448 -4449 -4450
4.40/4.48	v  -4451 -4452 -4453 -4454 -4455 -4456 4457 4458 4459 -4460
4.40/4.48	v  -4461 -4462 -4463 4464 4465 -4466 -4467 4468 -4469 4470
4.40/4.48	v  4471 4472 -4473 -4474 -4475 4476 -4477 -4478 4479 -4480
4.40/4.48	v  4481 4482 -4483 -4484 4485 4486 4487 4488 4489 -4490
4.40/4.48	v  4491 4492 4493 -4494 -4495 -4496 4497 4498 -4499 4500
4.40/4.48	v  4501 4502 4503 4504 4505 -4506 4507 4508 4509 -4510
4.40/4.48	v  4511 4512 4513 -4514 -4515 -4516 4517 4518 -4519 4520
4.40/4.48	v  -4521 -4522 -4523 -4524 4525 -4526 -4527 -4528 -4529 4530
4.40/4.48	v  4531 -4532 -4533 -4534 4535 4536 4537 -4538 -4539 -4540
4.40/4.48	v  4541 4542 -4543 -4544 4545 4546 -4547 -4548 -4549 -4550
4.40/4.48	v  -4551 -4552 4553 -4554 -4555 4556 -4557 -4558 -4559 -4560
4.40/4.48	v  -4561 4562 -4563 4564 4565 -4566 4567 -4568 -4569 -4570
4.40/4.48	v  4571 -4572 4573 -4574 4575 -4576 4577 -4578 -4579 -4580
4.40/4.48	v  4581 4582 -4583 -4584 -4585 4586 -4587 -4588 4589 -4590
4.40/4.48	v  -4591 -4592 -4593 -4594 -4595 4596 -4597 -4598 -4599 -4600
4.40/4.48	v  4601 -4602 -4603 4604 4605 4606 4607 -4608 -4609 4610
4.40/4.48	v  -4611 4612 -4613 -4614 -4615 4616 -4617 -4618 4619 -4620
4.40/4.48	v  -4621 4622 4623 -4624 4625 -4626 4627 4628 -4629 4630
4.40/4.48	v  4631 4632 -4633 4634 -4635 4636 4637 -4638 4639 -4640
4.40/4.48	v  4641 -4642 4643 4644 -4645 -4646 4647 -4648 -4649 4650
4.40/4.48	v  -4651 4652 -4653 -4654 -4655 -4656 -4657 -4658 4659 -4660
4.40/4.48	v  4661 4662 4663 4664 4665 -4666 -4667 4668 -4669 4670
4.40/4.48	v  -4671 4672 4673 -4674 -4675 -4676 -4677 -4678 -4679 -4680
4.40/4.48	v  -4681 -4682 -4683 4684 4685 4686 4687 4688 4689 -4690
4.40/4.48	v  -4691 4692 4693 -4694 -4695 4696 -4697 4698 4699 4700
4.40/4.48	v  -4701 4702 -4703 -4704 -4705 -4706 4707 -4708 -4709 4710
4.40/4.48	v  -4711 -4712 4713 4714 4715 -4716 4717 -4718 -4719 -4720
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4.40/4.48	v  -4731 4732 -4733 -4734 -4735 -4736 4737 -4738 4739 -4740
4.40/4.48	v  -4741 4742 4743 -4744 -4745 -4746 -4747 4748 4749 -4750
4.40/4.48	v  4751 -4752 -4753 -4754 -4755 -4756 -4757 -4758 -4759 -4760
4.40/4.48	v  -4761 -4762 4763 -4764 4765 4766 -4767 -4768 4769 -4770
4.40/4.48	v  4771 4772 -4773 -4774 4775 -4776 -4777 4778 -4779 4780
4.40/4.48	v  -4781 4782 4783 4784 -4785 -4786 -4787 -4788 4789 4790
4.40/4.48	v  4791 4792 -4793 4794 4795 -4796 -4797 -4798 4799 4800
4.40/4.48	v  4801 4802 4803 -4804 -4805 4806 -4807 4808 4809 -4810
4.40/4.48	v  4811 4812 4813 -4814 -4815 4816 4817 -4818 4819 4820
4.40/4.48	v  4821 4822 -4823 4824 4825 4826 4827 -4828 -4829 4830
4.40/4.48	v  -4831 -4832 -4833 -4834 4835 -4836 4837 4838 4839 -4840
4.40/4.48	v  -4841 4842 -4843 4844 4845 -4846 -4847 4848 -4849 4850
4.40/4.48	v  4851 -4852 4853 4854 4855 4856 -4857 -4858 -4859 4860
4.40/4.48	v  4861 -4862 -4863 -4864 4865 4866 -4867 4868 -4869 4870
4.40/4.48	v  -4871 4872 4873 4874 4875 4876 -4877 4878 -4879 4880
4.40/4.48	v  4881 4882 4883 4884 4885 4886 -4887 -4888 -4889 4890
4.40/4.48	v  4891 4892 -4893 -4894 -4895 -4896 4897 -4898 4899 -4900
4.40/4.48	v  -4901 -4902 4903 -4904 4905 -4906 -4907 4908 -4909 -4910
4.40/4.48	v  -4911 4912 -4913 -4914 4915 -4916 4917 -4918 4919 -4920
4.40/4.48	v  -4921 4922 4923 -4924 -4925 -4926 4927 4928 -4929 -4930
4.40/4.48	v  4931 4932 -4933 4934 4935 -4936 -4937 -4938 4939 4940
4.40/4.48	v  4941 4942 4943 4944 4945 4946 -4947 -4948 -4949 4950
4.40/4.48	v  -4951 4952 -4953 4954 -4955 4956 4957 -4958 4959 -4960
4.40/4.48	v  4961 -4962 -4963 -4964 4965 -4966 -4967 4968 4969 4970
4.40/4.48	v  -4971 -4972 -4973 4974 -4975 4976 -4977 -4978 4979 -4980
4.40/4.48	v  4981 -4982 -4983 4984 4985 -4986 -4987 -4988 4989 -4990
4.40/4.48	v  -4991 -4992 4993 4994 -4995 -4996 4997 -4998 4999 5000
4.40/4.48	v  0
4.40/4.48	c SearchSteps = 5890509
4.40/4.48	c SolveTime = 4.47

Verifier Data 

OK

Watcher Data 

runsolver Copyright (C) 2010 Olivier ROUSSEL

This is runsolver version 3.3.0 (svn: 893)

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

command line: BIN/runsolver --timestamp -w /tmp/evaluation-result-3162411-1301698322/watcher-3162411-1301698322 -o /tmp/evaluation-result-3162411-1301698322/solver-3162411-1301698322 -C 2400 -W 1300 -M 7680 sparrow2011 HOME/instance-3162411-1301698322.cnf 334332593 

running on 2 cores: 1,3

Enforcing CPUTime limit (soft limit, will send SIGTERM then SIGKILL): 2400 seconds
Enforcing CPUTime limit (hard limit, will send SIGXCPU): 2430 seconds
Enforcing wall clock limit (soft limit, will send SIGTERM then SIGKILL): 1300 seconds
Enforcing VSIZE limit (soft limit, will send SIGTERM then SIGKILL): 7864320 KiB
Enforcing VSIZE limit (hard limit, stack expansion will fail with SIGSEGV, brk() and mmap() will return ENOMEM): 7915520 KiB
Current StackSize limit: 10240 KiB


[startup+0 s]
/proc/loadavg: 3.45 3.86 3.79 4/186 12052
/proc/meminfo: memFree=21693312/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12232 CPUtime=0 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 399 0 0 0 0 0 0 0 21 0 1 0 262248471 12525568 339 33554432000 4194304 4568220 140735518507568 18446744073709551615 212039655168 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3058 339 147 92 0 1442 0

[startup+0.019382 s]
/proc/loadavg: 3.45 3.86 3.79 4/186 12052
/proc/meminfo: memFree=21693312/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=0.01 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 836 0 0 0 1 0 0 0 21 0 1 0 262248471 12521472 775 33554432000 4194304 4568220 140735518507568 18446744073709551615 4243284 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 775 172 92 0 1441 0
Current children cumulated CPU time (s) 0.01
Current children cumulated vsize (KiB) 12228

[startup+0.100366 s]
/proc/loadavg: 3.45 3.86 3.79 4/186 12052
/proc/meminfo: memFree=21693312/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=0.09 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 9 0 0 0 21 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4243295 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 0.09
Current children cumulated vsize (KiB) 12228

[startup+0.30033 s]
/proc/loadavg: 3.45 3.86 3.79 4/186 12052
/proc/meminfo: memFree=21693312/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=0.29 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 29 0 0 0 22 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4239928 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 0.29
Current children cumulated vsize (KiB) 12228

[startup+0.70026 s]
/proc/loadavg: 3.45 3.86 3.79 4/186 12052
/proc/meminfo: memFree=21693312/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=0.69 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 69 0 0 0 24 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4243402 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 0.69
Current children cumulated vsize (KiB) 12228

[startup+1.50011 s]
/proc/loadavg: 3.45 3.86 3.79 5/190 12071
/proc/meminfo: memFree=21683800/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=1.49 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 149 0 0 0 25 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4239474 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 1.49
Current children cumulated vsize (KiB) 12228

[startup+3.10083 s]
/proc/loadavg: 3.49 3.86 3.79 5/190 12071
/proc/meminfo: memFree=21682932/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=3.09 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 309 0 0 0 25 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4239625 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 3.09
Current children cumulated vsize (KiB) 12228

Solver just ended. Dumping a history of the last processes samples

[startup+3.90069 s]
/proc/loadavg: 3.49 3.86 3.79 5/190 12071
/proc/meminfo: memFree=21682808/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=3.89 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 389 0 0 0 25 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4243216 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 3.89
Current children cumulated vsize (KiB) 12228

[startup+4.30061 s]
/proc/loadavg: 3.49 3.86 3.79 5/190 12072
/proc/meminfo: memFree=21682808/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=4.3 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 430 0 0 0 25 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4240026 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 4.3
Current children cumulated vsize (KiB) 12228

[startup+4.4066 s]
/proc/loadavg: 3.49 3.86 3.79 5/190 12072
/proc/meminfo: memFree=21682808/32951124 swapFree=67111528/67111528
[pid=12052] ppid=12050 vsize=12228 CPUtime=4.4 cores=1,3
/proc/12052/stat : 12052 (sparrow2011) R 12050 12052 11983 0 -1 4202496 860 0 0 0 440 0 0 0 25 0 1 0 262248471 12521472 799 33554432000 4194304 4568220 140735518507568 18446744073709551615 4239928 0 0 4096 0 0 0 0 17 1 0 0 0
/proc/12052/statm: 3057 799 173 92 0 1441 0
Current children cumulated CPU time (s) 4.4
Current children cumulated vsize (KiB) 12228

Child status: 10
Real time (s): 4.48867
CPU time (s): 4.48732
CPU user time (s): 4.48332
CPU system time (s): 0.003999
CPU usage (%): 99.9698
Max. virtual memory (cumulated for all children) (KiB): 12228

getrusage(RUSAGE_CHILDREN,...) data:
user time used= 4.48332
system time used= 0.003999
maximum resident set size= 0
integral shared memory size= 0
integral unshared data size= 0
integral unshared stack size= 0
page reclaims= 878
page faults= 0
swaps= 0
block input operations= 0
block output operations= 0
messages sent= 0
messages received= 0
signals received= 0
voluntary context switches= 4
involuntary context switches= 14

runsolver used 0.006998 second user time and 0.020996 second system time

The end

Launcher Data 

Begin job on node146 at 2011-04-02 00:52:02
IDJOB=3162411
IDBENCH=82642
IDSOLVER=1573
FILE ID=node146/3162411-1301698322
RUNJOBID= node146-1301698322-12003
PBS_JOBID= 12840742
Free space on /tmp= 71980 MiB

SOLVER NAME= sparrow2011 sparrow2011_ubcsat1.2_2011-03-02
BENCH NAME= SAT11/random/large/unif-k3-r4.2-v5000-c21000-S1259410977-065-UNKNOWN.cnf
COMMAND LINE= sparrow2011 BENCHNAME RANDOMSEED
RUNSOLVER COMMAND LINE= BIN/runsolver --timestamp -w /tmp/evaluation-result-3162411-1301698322/watcher-3162411-1301698322 -o /tmp/evaluation-result-3162411-1301698322/solver-3162411-1301698322 -C 2400 -W 1300 -M 7680  sparrow2011 HOME/instance-3162411-1301698322.cnf 334332593

TIME LIMIT= 2400 seconds
MEMORY LIMIT= 7680 MiB
NBCORE= 2

MD5SUM BENCH= 01bef578d60d53fc18e9469f59ed2fd1
RANDOM SEED=334332593

node146.alineos.net Linux 2.6.18-164.el5 #1 SMP Thu Sep 3 03:28:30 EDT 2009

/proc/cpuinfo:
processor	: 0
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 0
siblings	: 4
core id		: 0
cpu cores	: 4
apicid		: 0
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5333.66
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]

processor	: 1
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 1
siblings	: 4
core id		: 0
cpu cores	: 4
apicid		: 16
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5332.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]

processor	: 2
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 0
siblings	: 4
core id		: 1
cpu cores	: 4
apicid		: 2
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5332.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]

processor	: 3
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 1
siblings	: 4
core id		: 1
cpu cores	: 4
apicid		: 18
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5332.86
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]

processor	: 4
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 0
siblings	: 4
core id		: 2
cpu cores	: 4
apicid		: 4
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5332.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]

processor	: 5
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 1
siblings	: 4
core id		: 2
cpu cores	: 4
apicid		: 20
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5332.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]

processor	: 6
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 0
siblings	: 4
core id		: 3
cpu cores	: 4
apicid		: 6
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5332.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]

processor	: 7
vendor_id	: GenuineIntel
cpu family	: 6
model		: 26
model name	: Intel(R) Xeon(R) CPU           X5550  @ 2.67GHz
stepping	: 5
cpu MHz		: 2666.830
cache size	: 8192 KB
physical id	: 1
siblings	: 4
core id		: 3
cpu cores	: 4
apicid		: 22
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx rdtscp lm constant_tsc ida nonstop_tsc pni monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips	: 5332.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: [8]


/proc/meminfo:
MemTotal:     32951124 kB
MemFree:      21693584 kB
Buffers:        338792 kB
Cached:       10591304 kB
SwapCached:          0 kB
Active:        7167784 kB
Inactive:      3835520 kB
HighTotal:           0 kB
HighFree:            0 kB
LowTotal:     32951124 kB
LowFree:      21693584 kB
SwapTotal:    67111528 kB
SwapFree:     67111528 kB
Dirty:            3648 kB
Writeback:           0 kB
AnonPages:       73032 kB
Mapped:          14720 kB
Slab:           189412 kB
PageTables:       4632 kB
NFS_Unstable:        0 kB
Bounce:              0 kB
CommitLimit:  83587088 kB
Committed_AS:   247664 kB
VmallocTotal: 34359738367 kB
VmallocUsed:    296008 kB
VmallocChunk: 34359440975 kB
HugePages_Total:     0
HugePages_Free:      0
HugePages_Rsvd:      0
Hugepagesize:     2048 kB

Free space on /tmp at the end= 71980 MiB
End job on node146 at 2011-04-02 00:52:07